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authorBenjamin Herrenschmidt2017-02-03 17:20:07 +1100
committerMichael Ellerman2017-02-06 19:46:04 +1100
commit98a5f361b8625c6f4841d6ba013bbf0e80d08147 (patch)
tree4ed95efaf4243a91d9542e1431dca008df075d5e /arch/powerpc/kernel
parent608b42140e966a65cabc68d997875065f3e63c2f (diff)
powerpc: Add new cache geometry aux vectors
This adds AUX vectors for the L1I,D, L2 and L3 cache levels providing for each cache level the size of the cache in bytes and the geometry (line size and number of ways). We chose to not use the existing alpha/sh definition which packs all the information in a single entry per cache level as it is too restricted to represent some of the geometries used on POWER. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/kernel')
-rw-r--r--arch/powerpc/kernel/setup_64.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 364fbffd7e83..b9855f1b290a 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -411,6 +411,11 @@ static void init_cache_info(struct ppc_cache_info *info, u32 size, u32 lsize,
info->block_size = bsize;
info->log_block_size = __ilog2(bsize);
info->blocks_per_page = PAGE_SIZE / bsize;
+
+ if (sets == 0)
+ info->assoc = 0xffff;
+ else
+ info->assoc = size / (sets * lsize);
}
static bool __init parse_cache_info(struct device_node *np,