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authorMichael Ellerman2016-07-07 22:54:29 +1000
committerMichael Ellerman2016-07-14 20:26:24 +1000
commit1846193b178dcc58435fdc57352db7b74826ef37 (patch)
tree1d03f9fadedf09d0174b1487552fb22b06c3988b /arch/powerpc/xmon
parent56346ad88d65fd60dde7b0535ff08daac45b560b (diff)
powerpc/xmon: Dump ISA 2.06 SPRs
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/xmon')
-rw-r--r--arch/powerpc/xmon/xmon.c31
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 4300ad63ad8e..8d95793365d8 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -1682,6 +1682,35 @@ write_spr(int n, unsigned long val)
catch_spr_faults = 0;
}
+static void dump_206_sprs(void)
+{
+#ifdef CONFIG_PPC64
+ if (!cpu_has_feature(CPU_FTR_ARCH_206))
+ return;
+
+ /* Actually some of these pre-date 2.06, but whatevs */
+
+ printf("srr0 = %.16x srr1 = %.16x dsisr = %.8x\n",
+ mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR));
+ printf("dscr = %.16x ppr = %.16x pir = %.8x\n",
+ mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR));
+
+ if (!(mfmsr() & MSR_HV))
+ return;
+
+ printf("sdr1 = %.16x hdar = %.16x hdsisr = %.8x\n",
+ mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR));
+ printf("hsrr0 = %.16x hsrr1 = %.16x hdec = %.8x\n",
+ mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC));
+ printf("lpcr = %.16x pcr = %.16x lpidr = %.8x\n",
+ mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID));
+ printf("hsprg0 = %.16x hsprg1 = %.16x\n",
+ mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1));
+ printf("dabr = %.16x dabrx = %.16x\n",
+ mfspr(SPRN_DABR), mfspr(SPRN_DABRX));
+#endif
+}
+
static void dump_one_spr(int spr, bool show_unimplemented)
{
@@ -1734,6 +1763,8 @@ static void super_regs(void)
printf("sp = "REG" sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3));
printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR));
+ dump_206_sprs();
+
return;
}
case 'w': {