diff options
author | Samuel Holland | 2022-11-26 00:15:56 -0600 |
---|---|---|
committer | Palmer Dabbelt | 2022-11-28 15:27:00 -0800 |
commit | 1d6b5ed41f8c5c7012dbebe9bc0e2292a5a232b4 (patch) | |
tree | 337b58e6aaf58a94d17060803d52d89f3f66bea7 /arch/riscv/Kconfig | |
parent | fcae44fd36d052e956e69a64642fc03820968d78 (diff) |
riscv: Fix NR_CPUS range conditions
The conditions reference the symbol SBI_V01, which does not exist. The
correct symbol is RISCV_SBI_V01.
Fixes: e623715f3d67 ("RISC-V: Increase range and default value of NR_CPUS")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20221126061557.3541-1-samuel@sholland.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/Kconfig')
-rw-r--r-- | arch/riscv/Kconfig | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index fa78595a6089..593cf09264d8 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -317,9 +317,9 @@ config SMP config NR_CPUS int "Maximum number of CPUs (2-512)" depends on SMP - range 2 512 if !SBI_V01 - range 2 32 if SBI_V01 && 32BIT - range 2 64 if SBI_V01 && 64BIT + range 2 512 if !RISCV_SBI_V01 + range 2 32 if RISCV_SBI_V01 && 32BIT + range 2 64 if RISCV_SBI_V01 && 64BIT default "32" if 32BIT default "64" if 64BIT |