diff options
| author | Christoph Hellwig | 2018-01-16 09:37:50 +0100 |
|---|---|---|
| committer | Palmer Dabbelt | 2018-01-30 19:14:27 -0800 |
| commit | 5ec9c4ff0430e33b602cc0ff8ab9dec8ef548d28 (patch) | |
| tree | 3fb2ff5397466ecc5516d7e8d56e71e17e15ca41 /arch/riscv/kernel/setup.c | |
| parent | f1b65f20fb05d1dd94656904848b96cc6df52bc0 (diff) | |
riscv: add ZONE_DMA32
This patch allows devices that require memory that can be addressed
using 32-bit addresses to work easily on RISC-V systems. The newly
improved dma-direct ops will tap into this pool automatically for
32-bit addressing.
Based on an earlier patch from Wesley W. Terpstra.
CC: Wesley W. Terpstra <terpstra@sifive.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'arch/riscv/kernel/setup.c')
| -rw-r--r-- | arch/riscv/kernel/setup.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c index c6d095ff5ab8..09f7064e898c 100644 --- a/arch/riscv/kernel/setup.c +++ b/arch/riscv/kernel/setup.c @@ -181,6 +181,15 @@ static void __init setup_bootmem(void) early_init_fdt_scan_reserved_mem(); memblock_allow_resize(); memblock_dump_all(); + + for_each_memblock(memory, reg) { + unsigned long start_pfn = memblock_region_memory_base_pfn(reg); + unsigned long end_pfn = memblock_region_memory_end_pfn(reg); + + memblock_set_node(PFN_PHYS(start_pfn), + PFN_PHYS(end_pfn - start_pfn), + &memblock.memory, 0); + } } void __init setup_arch(char **cmdline_p) |