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authorNicolin Chen2014-05-06 16:56:00 +0800
committerMark Brown2014-05-12 23:13:13 +0100
commit57ebbcafab0ce8cce4493c6a243ecdd7066e6ef1 (patch)
treef1c3fc761b5e43b85d319f580f9f04991125154d /arch/sparc
parent89e47f62cf3eea7ad5e3d7d72ea846be37d6e352 (diff)
ASoC: fsl_esai: Only bypass sck_div for EXTAL source
ESAI can only output EXTAL clock source directly. But for FSYS clock source, ESAI can not output it without getting through PSR PM dividers. So this patch adds an extra check in the code. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'arch/sparc')
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