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authorChris Metcalf2012-04-07 17:10:17 -0400
committerChris Metcalf2012-07-18 16:39:11 -0400
commit129622672d70711c6c844fb529381ff0dad9085a (patch)
treeea05d97ec3a457814e282c5cf8423c9e30994cb9 /arch/tile/mm
parentbce5bbbb23f780a792be7e594af7cd4b4aae1cd4 (diff)
arch/tile: tilegx PCI root complex support
This change implements PCIe root complex support for tilegx using the kernel support layer for accessing the TRIO hardware shim. Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> [changes in 07487f3] Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/mm')
-rw-r--r--arch/tile/mm/pgtable.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/tile/mm/pgtable.c b/arch/tile/mm/pgtable.c
index 345edfed9fcd..de0de0c0e8a1 100644
--- a/arch/tile/mm/pgtable.c
+++ b/arch/tile/mm/pgtable.c
@@ -575,13 +575,6 @@ void __iomem *ioremap_prot(resource_size_t phys_addr, unsigned long size,
}
EXPORT_SYMBOL(ioremap_prot);
-/* Map a PCI MMIO bus address into VA space. */
-void __iomem *ioremap(resource_size_t phys_addr, unsigned long size)
-{
- panic("ioremap for PCI MMIO is not supported");
-}
-EXPORT_SYMBOL(ioremap);
-
/* Unmap an MMIO VA mapping. */
void iounmap(volatile void __iomem *addr_in)
{