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authorPeter Zijlstra2022-03-08 16:30:23 +0100
committerPeter Zijlstra2022-03-15 10:32:35 +0100
commit5b2fc51576eff811a614e33cbbd0c3cb05022892 (patch)
tree7e29a5e6c80c12bdc17ff1b832840f16ffcbb658 /arch/x86/entry
parent8b87d8cec1b31ea710568ae49ba5f5146318da0d (diff)
x86/ibt,xen: Sprinkle the ENDBR
Even though Xen currently doesn't advertise IBT, prepare for when it will eventually do so and sprinkle the ENDBR dust accordingly. Even though most of the entry points are IRET like, the CPL0 Hypervisor can set WAIT-FOR-ENDBR and demand ENDBR at these sites. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Josh Poimboeuf <jpoimboe@redhat.com> Link: https://lore.kernel.org/r/20220308154317.873919996@infradead.org
Diffstat (limited to 'arch/x86/entry')
-rw-r--r--arch/x86/entry/entry_64.S1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index f731393b5af4..3fd38286302d 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -809,6 +809,7 @@ SYM_CODE_END(exc_xen_hypervisor_callback)
*/
SYM_CODE_START(xen_failsafe_callback)
UNWIND_HINT_EMPTY
+ ENDBR
movl %ds, %ecx
cmpw %cx, 0x10(%rsp)
jne 1f