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authorKan Liang2023-01-06 08:04:47 -0800
committerGreg Kroah-Hartman2023-02-09 11:28:12 +0100
commit35e44dc402838a5703307b9d8485031077359cb7 (patch)
treee3393b2dad4bb1c9d07ccd78693c25a2fc556dfb /arch/x86/events
parente095f0d86e3a43d3448768b5dcbd08dbf3d18523 (diff)
perf/x86/intel/cstate: Add Emerald Rapids
[ Upstream commit 5a8a05f165fb18d37526062419774d9088c2a9b9 ] From the perspective of Intel cstate residency counters, Emerald Rapids is the same as the Sapphire Rapids and Ice Lake. Add Emerald Rapids model. Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20230106160449.3566477-2-kan.liang@linux.intel.com Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/x86/events')
-rw-r--r--arch/x86/events/intel/cstate.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
index 3019fb1926e3..551741e79e03 100644
--- a/arch/x86/events/intel/cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -677,6 +677,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &icx_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &icx_cstates),
X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &icx_cstates),
+ X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &icx_cstates),
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &icl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &icl_cstates),