diff options
| author | Kan Liang | 2020-07-23 10:11:12 -0700 |
|---|---|---|
| committer | Peter Zijlstra | 2020-08-18 16:34:36 +0200 |
| commit | 0e2e45e2ded4988f5641115fd996c75dc32e4be3 (patch) | |
| tree | 86090dd85afbbac4faf9dd09b1a79325037a5cb5 /arch/x86 | |
| parent | 7b2c05a15d29d0570a0d21da1e4fd5cbc85cbf13 (diff) | |
perf/x86: Add a macro for RDPMC offset of fixed counters
The RDPMC base offset of fixed counters is hard-code. Use a meaningful
name to replace the magic number to improve the readability of the code.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200723171117.9918-10-kan.liang@linux.intel.com
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/events/core.c | 3 | ||||
| -rw-r--r-- | arch/x86/include/asm/perf_event.h | 3 |
2 files changed, 5 insertions, 1 deletions
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c index 53fcf0a2b025..ebf723f33794 100644 --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -1151,7 +1151,8 @@ static inline void x86_assign_hw_event(struct perf_event *event, hwc->config_base = MSR_ARCH_PERFMON_FIXED_CTR_CTRL; hwc->event_base = MSR_ARCH_PERFMON_FIXED_CTR0 + (idx - INTEL_PMC_IDX_FIXED); - hwc->event_base_rdpmc = (idx - INTEL_PMC_IDX_FIXED) | 1<<30; + hwc->event_base_rdpmc = (idx - INTEL_PMC_IDX_FIXED) | + INTEL_PMC_FIXED_RDPMC_BASE; break; default: diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index 000cab7818b5..964ba312c249 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -196,6 +196,9 @@ struct x86_pmu_capability { * Fixed-purpose performance events: */ +/* RDPMC offset for Fixed PMCs */ +#define INTEL_PMC_FIXED_RDPMC_BASE (1 << 30) + /* * All the fixed-mode PMCs are configured via this single MSR: */ |