diff options
| author | Max Filippov | 2018-11-25 23:32:28 -0800 |
|---|---|---|
| committer | Max Filippov | 2018-12-04 14:08:23 -0800 |
| commit | 5dacbbef3d29598dcb6ecf747a7dae4fbb4ce039 (patch) | |
| tree | f16186e35223f471954641a8a9631ea5a7fcdb87 /arch/xtensa | |
| parent | cad6fade6e78030e60188da3f18090577daa9243 (diff) | |
xtensa: simplify coprocessor.S
Use addresses instead of offsets and drop unneeded offset -> address
calculations. Don't generate any code for undefined coprocessors.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa')
| -rw-r--r-- | arch/xtensa/kernel/coprocessor.S | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/arch/xtensa/kernel/coprocessor.S b/arch/xtensa/kernel/coprocessor.S index 43091429363d..92bf24a9da92 100644 --- a/arch/xtensa/kernel/coprocessor.S +++ b/arch/xtensa/kernel/coprocessor.S @@ -33,16 +33,16 @@ */ #define SAVE_CP_REGS(x) \ - .align 4; \ - .Lsave_cp_regs_cp##x: \ .if XTENSA_HAVE_COPROCESSOR(x); \ + .align 4; \ + .Lsave_cp_regs_cp##x: \ xchal_cp##x##_store a2 a4 a5 a6 a7; \ - .endif; \ - jx a0 + jx a0; \ + .endif #define SAVE_CP_REGS_TAB(x) \ .if XTENSA_HAVE_COPROCESSOR(x); \ - .long .Lsave_cp_regs_cp##x - .Lsave_cp_regs_jump_table; \ + .long .Lsave_cp_regs_cp##x; \ .else; \ .long 0; \ .endif; \ @@ -50,16 +50,16 @@ #define LOAD_CP_REGS(x) \ - .align 4; \ - .Lload_cp_regs_cp##x: \ .if XTENSA_HAVE_COPROCESSOR(x); \ + .align 4; \ + .Lload_cp_regs_cp##x: \ xchal_cp##x##_load a2 a4 a5 a6 a7; \ - .endif; \ - jx a0 + jx a0; \ + .endif #define LOAD_CP_REGS_TAB(x) \ .if XTENSA_HAVE_COPROCESSOR(x); \ - .long .Lload_cp_regs_cp##x - .Lload_cp_regs_jump_table; \ + .long .Lload_cp_regs_cp##x; \ .else; \ .long 0; \ .endif; \ @@ -83,6 +83,7 @@ LOAD_CP_REGS(6) LOAD_CP_REGS(7) + .section ".rodata", "a" .align 4 .Lsave_cp_regs_jump_table: SAVE_CP_REGS_TAB(0) @@ -104,6 +105,8 @@ LOAD_CP_REGS_TAB(6) LOAD_CP_REGS_TAB(7) + .previous + /* * coprocessor_flush(struct thread_info*, index) * a2 a3 @@ -126,8 +129,7 @@ ENTRY(coprocessor_flush) l32i a3, a3, 0 add a2, a2, a4 beqz a3, 1f - add a0, a0, a3 - callx0 a0 + callx0 a3 1: l32i a0, a1, 0 retw @@ -212,10 +214,9 @@ ENTRY(fast_coprocessor) movi a0, 2f # a0: 'return' address addx8 a3, a3, a5 # a3: coprocessor number l32i a2, a3, 4 # a2: xtregs offset - l32i a3, a3, 0 # a3: jump offset + l32i a3, a3, 0 # a3: jump address add a2, a2, a4 - add a4, a3, a5 # a4: address of save routine - jx a4 + jx a3 /* Note that only a0 and a1 were preserved. */ @@ -235,10 +236,9 @@ ENTRY(fast_coprocessor) movi a0, 1f addx8 a3, a3, a5 l32i a2, a3, 4 # a2: xtregs offset - l32i a3, a3, 0 # a3: jump offset + l32i a3, a3, 0 # a3: jump address add a2, a2, a4 - add a4, a3, a5 - jx a4 + jx a3 /* Restore all registers and return from exception handler. */ |