diff options
| author | Guo Ren | 2023-04-06 04:46:49 -0400 |
|---|---|---|
| committer | Guo Ren | 2023-04-13 02:36:14 -0400 |
| commit | 1f62ed00a56bf01becaccd81bf30f2fcb0322fd2 (patch) | |
| tree | 07a1de94dab5df8fa540b11facf1b0ecd1b84866 /arch | |
| parent | 74c53b5717ba762d8648ee9e3d961093df2d7300 (diff) | |
csky: mmu: Prevent spurious page faults
C-SKY MMU would pre-fetch invalid pte entries, and it could work with
flush_tlb_fix_spurious_fault, but the additional page fault exceptions
would reduce performance. So flushing the entry of the TLB would prevent
the following spurious page faults. Here is the test code:
define DATA_LEN 4096
define COPY_NUM (504*100)
unsigned char src[DATA_LEN*COPY_NUM] = {0};
unsigned char dst[DATA_LEN*COPY_NUM] = {0};
unsigned char func_src[DATA_LEN*COPY_NUM] = {0};
unsigned char func_dst[DATA_LEN*COPY_NUM] = {0};
void main(void)
{
int j;
for (j = 0; j < COPY_NUM; j++)
memcpy(&dst[j*DATA_LEN], &src[j*DATA_LEN], 4);
}
perf stat -e page-faults ./main.elf
The amount of page fault traps would be reduced in half with the patch.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/csky/abiv1/cacheflush.c | 3 | ||||
| -rw-r--r-- | arch/csky/abiv2/cacheflush.c | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/arch/csky/abiv1/cacheflush.c b/arch/csky/abiv1/cacheflush.c index fb91b069dc69..94fbc03cbe70 100644 --- a/arch/csky/abiv1/cacheflush.c +++ b/arch/csky/abiv1/cacheflush.c @@ -11,6 +11,7 @@ #include <asm/cache.h> #include <asm/cacheflush.h> #include <asm/cachectl.h> +#include <asm/tlbflush.h> #define PG_dcache_clean PG_arch_1 @@ -40,6 +41,8 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn = pte_pfn(*ptep); struct page *page; + flush_tlb_page(vma, addr); + if (!pfn_valid(pfn)) return; diff --git a/arch/csky/abiv2/cacheflush.c b/arch/csky/abiv2/cacheflush.c index 39c51399dd81..9923cd24db58 100644 --- a/arch/csky/abiv2/cacheflush.c +++ b/arch/csky/abiv2/cacheflush.c @@ -5,6 +5,7 @@ #include <linux/highmem.h> #include <linux/mm.h> #include <asm/cache.h> +#include <asm/tlbflush.h> void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *pte) @@ -12,6 +13,8 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, unsigned long addr; struct page *page; + flush_tlb_page(vma, address); + if (!pfn_valid(pte_pfn(*pte))) return; |