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authorJiaxun Yang2024-02-02 12:30:27 +0000
committerThomas Bogendoerfer2024-02-12 23:04:40 +0100
commit9d6e21ddf20293b3880ae55b9d14de91c5891c59 (patch)
tree9635e60f51ed938cfc63626b3a875ee3409fc991 /arch
parent11ba1728be3edb6928791f4c622f154ebe228ae6 (diff)
MIPS: Clear Cause.BD in instruction_pointer_set
Clear Cause.BD after we use instruction_pointer_set to override EPC. This can prevent exception_epc check against instruction code at new return address. It won't be considered as "in delay slot" after epc being overridden anyway. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/include/asm/ptrace.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h
index 701a233583c2..d14d0e37ad02 100644
--- a/arch/mips/include/asm/ptrace.h
+++ b/arch/mips/include/asm/ptrace.h
@@ -60,6 +60,7 @@ static inline void instruction_pointer_set(struct pt_regs *regs,
unsigned long val)
{
regs->cp0_epc = val;
+ regs->cp0_cause &= ~CAUSEF_BD;
}
/* Query offset/name of register from its name/offset */