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authorIsaku Yamahata2008-10-17 11:17:46 +0900
committerTony Luck2008-10-17 09:53:33 -0700
commit1b051c6be34b3b06fa1244d9fcd47f91fb6aca1c (patch)
tree8b3704eabad3de3ec8c55b55e81a80c2d7fec75c /arch
parentda0ac27213d6f8f7d6ca918031572eaf7f14dca3 (diff)
ia64/xen: introduce sync bitops which is necessary for ia64/xen support.
define sync bitops which is necessary for ia64/xen. This bit operation is used to communicate with VMM or other guest kernel Even when this kernel is built for UP, VMM might be SMP so that those operation must always use atomic operation. Cc: Robin Holt <holt@sgi.com> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/ia64/include/asm/sync_bitops.h51
1 files changed, 51 insertions, 0 deletions
diff --git a/arch/ia64/include/asm/sync_bitops.h b/arch/ia64/include/asm/sync_bitops.h
new file mode 100644
index 000000000000..593c12eeb270
--- /dev/null
+++ b/arch/ia64/include/asm/sync_bitops.h
@@ -0,0 +1,51 @@
+#ifndef _ASM_IA64_SYNC_BITOPS_H
+#define _ASM_IA64_SYNC_BITOPS_H
+
+/*
+ * Copyright (C) 2008 Isaku Yamahata <yamahata at valinux co jp>
+ *
+ * Based on synch_bitops.h which Dan Magenhaimer wrote.
+ *
+ * bit operations which provide guaranteed strong synchronisation
+ * when communicating with Xen or other guest OSes running on other CPUs.
+ */
+
+static inline void sync_set_bit(int nr, volatile void *addr)
+{
+ set_bit(nr, addr);
+}
+
+static inline void sync_clear_bit(int nr, volatile void *addr)
+{
+ clear_bit(nr, addr);
+}
+
+static inline void sync_change_bit(int nr, volatile void *addr)
+{
+ change_bit(nr, addr);
+}
+
+static inline int sync_test_and_set_bit(int nr, volatile void *addr)
+{
+ return test_and_set_bit(nr, addr);
+}
+
+static inline int sync_test_and_clear_bit(int nr, volatile void *addr)
+{
+ return test_and_clear_bit(nr, addr);
+}
+
+static inline int sync_test_and_change_bit(int nr, volatile void *addr)
+{
+ return test_and_change_bit(nr, addr);
+}
+
+static inline int sync_test_bit(int nr, const volatile void *addr)
+{
+ return test_bit(nr, addr);
+}
+
+#define sync_cmpxchg(ptr, old, new) \
+ ((__typeof__(*(ptr)))cmpxchg_acq((ptr), (old), (new)))
+
+#endif /* _ASM_IA64_SYNC_BITOPS_H */