diff options
| author | Nicolas Pitre | 2008-06-11 12:40:13 -0400 |
|---|---|---|
| committer | Lennert Buytenhek | 2008-06-22 22:44:37 +0200 |
| commit | 4c4925c1f4ccd72002957c3e73b4f117f2bcf712 (patch) | |
| tree | d9f45dc842ecdb143910bfaf8a920e2a88fb7073 /arch | |
| parent | f76e9154736e9ab47b64940d0062f19c80225b7f (diff) | |
[ARM] fix cache alignment code in memset.S
This code is currently disabled, which explains why no one was affected.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/lib/memmove.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/lib/memmove.S b/arch/arm/lib/memmove.S index ef7fddc14ac9..018522c3ff26 100644 --- a/arch/arm/lib/memmove.S +++ b/arch/arm/lib/memmove.S @@ -60,6 +60,7 @@ ENTRY(memmove) CALGN( bcs 2f ) CALGN( adr r4, 6f ) CALGN( subs r2, r2, ip ) @ C is set here + CALGN( rsb ip, ip, #32 ) CALGN( add pc, r4, ip ) PLD( pld [r1, #-4] ) @@ -139,7 +140,6 @@ ENTRY(memmove) blt 14f CALGN( ands ip, r1, #31 ) - CALGN( rsb ip, ip, #32 ) CALGN( sbcnes r4, ip, r2 ) @ C is always set here CALGN( subcc r2, r2, ip ) CALGN( bcc 15f ) |