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authorPaul Walmsley2013-01-26 00:58:14 -0700
committerPaul Walmsley2013-01-29 14:59:57 -0700
commit53e1cb469e6cf353aa581e6b0a36cca359ecee25 (patch)
treedbd9c5666d7887a3ec8802b108c7f7afddd97ef0 /arch
parentc165a14023ecec8a68f3b87d0c3c822426065937 (diff)
ARM: OMAP2+: clockdomain: add pwrdm_state_switch() call to clkdm_sleep()
In clkdm_sleep(), the powerdomain should be eligible to switch power states right after the call to the low-level clockdomain sleep function. We should have been tracking that with the pwrdm_state_switch() code, but we weren't, for whatever reason. Fix that. This resolves the "pwrdm state mismatch(cam_pwrdm) 3 != 0" that appears during the OMAP4460 Pandaboard-ES PM test, e.g. here: http://www.pwsan.com/omap/testlogs/test_v3.8-rc5/20130126003323/pm/4460pandaes/4460pandaes_log.txt Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Tero Kristo <t-kristo@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/clockdomain.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 7faf82d4e85c..f0ec51497ce2 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -764,6 +764,7 @@ int clkdm_sleep(struct clockdomain *clkdm)
spin_lock_irqsave(&clkdm->lock, flags);
clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED;
ret = arch_clkdm->clkdm_sleep(clkdm);
+ ret |= pwrdm_state_switch(clkdm->pwrdm.ptr);
spin_unlock_irqrestore(&clkdm->lock, flags);
return ret;
}