diff options
| author | Konstantin Khlebnikov | 2014-07-25 09:16:28 +0100 |
|---|---|---|
| committer | Russell King | 2014-08-09 08:42:12 +0100 |
| commit | 7fb00c2fca4b6c58be521eb3676cf4b4ba8dde3b (patch) | |
| tree | a20d6a53ad109aa7e3e787981811cc739964d5df /arch | |
| parent | c309bfa9b481e7dbd3e1ab819271bf3009f44859 (diff) | |
ARM: 8114/1: LPAE: load upper bits of early TTBR0/TTBR1
This patch fixes booting when idmap pgd lays above 4gb. Commit
4756dcbfd37 mostly had fixed this, but it'd failed to load upper bits.
Also this fixes adding TTBR1_OFFSET to TTRR1: if lower part overflows
carry flag must be added to the upper part.
Signed-off-by: Konstantin Khlebnikov <k.khlebnikov@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mm/proc-v7-3level.S | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S index e4c8acfc1323..1a24e9232ec8 100644 --- a/arch/arm/mm/proc-v7-3level.S +++ b/arch/arm/mm/proc-v7-3level.S @@ -146,12 +146,11 @@ ENDPROC(cpu_v7_set_pte_ext) mov \tmp, \ttbr1, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits mov \ttbr1, \ttbr1, lsl #ARCH_PGD_SHIFT @ lower bits addls \ttbr1, \ttbr1, #TTBR1_OFFSET - mcrr p15, 1, \ttbr1, \zero, c2 @ load TTBR1 + adcls \tmp, \tmp, #0 + mcrr p15, 1, \ttbr1, \tmp, c2 @ load TTBR1 mov \tmp, \ttbr0, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits mov \ttbr0, \ttbr0, lsl #ARCH_PGD_SHIFT @ lower bits - mcrr p15, 0, \ttbr0, \zero, c2 @ load TTBR0 - mcrr p15, 1, \ttbr1, \zero, c2 @ load TTBR1 - mcrr p15, 0, \ttbr0, \zero, c2 @ load TTBR0 + mcrr p15, 0, \ttbr0, \tmp, c2 @ load TTBR0 .endm /* |