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authorAtish Patra2022-03-18 19:26:33 -0700
committerPalmer Dabbelt2022-03-30 23:22:31 -0700
commit8a122a66c77034d7dc8f692e1b5c7a3b60c374b3 (patch)
tree4aaddfb20012264f58f179715eedda699631bc26 /arch
parentb81d591386c3a50b96dddcf663628ea0df0bf2b3 (diff)
RISC-V: Fix a comment typo in riscv_of_parent_hartid()
This fixes a typo in a comment that is both obvious and went unnoticed. Signed-off-by: Atish Patra <atishp@rivosinc.com> Fixes: a9b202606c69 ("RISC-V: Improve /proc/cpuinfo output for ISA extensions") Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/riscv/kernel/cpu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index d2a936195295..4c303cdc8039 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -73,7 +73,7 @@ int riscv_of_parent_hartid(struct device_node *node)
* Here are the ordering rules of extension naming defined by RISC-V
* specification :
* 1. All extensions should be separated from other multi-letter extensions
- * from other multi-letter extensions by an underscore.
+ * by an underscore.
* 2. The first letter following the 'Z' conventionally indicates the most
* closely related alphabetical extension category, IMAFDQLCBKJTPVH.
* If multiple 'Z' extensions are named, they should be ordered first