diff options
| author | Lubomir Rintel | 2018-11-28 18:53:11 +0100 |
|---|---|---|
| committer | Olof Johansson | 2018-11-30 15:13:14 -0800 |
| commit | 8a22b194cedfee5347f198eec7796080696c5050 (patch) | |
| tree | db78a1ef0c5135f3877099ff7517627d8a7a22db /arch | |
| parent | 1147e05ac9fc2ef86a3691e7ca5c2db7602d81dd (diff) | |
ARM: dts: mmp2: add more TWSI controllers
I've gotten the base addresses, clocks and interrupts from an rusty and old
out-of-tree driver. I haven't actually checked against the datasheet, since
that one is reserved for the Marvell inner circle.
Tested with an accelerometer on TWSI6 on an OLPC XO 1.75 machine.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/mmp2.dtsi | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi index c5787eea57c7..c48d17a38d6b 100644 --- a/arch/arm/boot/dts/mmp2.dtsi +++ b/arch/arm/boot/dts/mmp2.dtsi @@ -269,6 +269,55 @@ status = "disabled"; }; + twsi3: i2c@d4032000 { + compatible = "mrvl,mmp-twsi"; + reg = <0xd4032000 0x1000>; + interrupt-parent = <&intcmux17>; + interrupts = <1>; + clocks = <&soc_clocks MMP2_CLK_TWSI2>; + resets = <&soc_clocks MMP2_CLK_TWSI2>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + twsi4: i2c@d4033000 { + compatible = "mrvl,mmp-twsi"; + reg = <0xd4033000 0x1000>; + interrupt-parent = <&intcmux17>; + interrupts = <2>; + clocks = <&soc_clocks MMP2_CLK_TWSI3>; + resets = <&soc_clocks MMP2_CLK_TWSI3>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + + twsi5: i2c@d4033800 { + compatible = "mrvl,mmp-twsi"; + reg = <0xd4033800 0x1000>; + interrupt-parent = <&intcmux17>; + interrupts = <3>; + clocks = <&soc_clocks MMP2_CLK_TWSI4>; + resets = <&soc_clocks MMP2_CLK_TWSI4>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + twsi6: i2c@d4034000 { + compatible = "mrvl,mmp-twsi"; + reg = <0xd4034000 0x1000>; + interrupt-parent = <&intcmux17>; + interrupts = <4>; + clocks = <&soc_clocks MMP2_CLK_TWSI5>; + resets = <&soc_clocks MMP2_CLK_TWSI5>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + rtc: rtc@d4010000 { compatible = "mrvl,mmp-rtc"; reg = <0xd4010000 0x1000>; |