diff options
author | Russell King | 2009-05-16 11:51:14 +0100 |
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committer | Russell King | 2009-05-17 19:00:37 +0100 |
commit | a8cbcd92bd4bf893085eddf7f58e63ea98503d94 (patch) | |
tree | 7798cd1487362208793632f4ff0b4a6f579eb0ec /arch | |
parent | 49613d4d9ae759193915823e67de546fca58c951 (diff) |
[ARM] smp: separate SCU support code from realview
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/Kconfig | 7 | ||||
-rw-r--r-- | arch/arm/include/asm/smp_scu.h | 10 | ||||
-rw-r--r-- | arch/arm/kernel/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/kernel/smp_scu.c | 41 | ||||
-rw-r--r-- | arch/arm/mach-realview/platsmp.c | 29 |
5 files changed, 56 insertions, 32 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ef4f860d5041..f19a9519a723 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -861,6 +861,7 @@ config SMP depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP) depends on GENERIC_CLOCKEVENTS select USE_GENERIC_SMP_HELPERS + select HAVE_ARM_SCU if ARCH_REALVIEW help This enables support for systems with more than one CPU. If you have a system with only one CPU, like most personal computers, say N. If @@ -878,6 +879,12 @@ config SMP If you don't know what to do here, say N. +config HAVE_ARM_SCU + bool + depends on SMP + help + This option enables support for the ARM system coherency unit + choice prompt "Memory split" default VMSPLIT_3G diff --git a/arch/arm/include/asm/smp_scu.h b/arch/arm/include/asm/smp_scu.h index d55802d645af..2376835015d6 100644 --- a/arch/arm/include/asm/smp_scu.h +++ b/arch/arm/include/asm/smp_scu.h @@ -1,13 +1,7 @@ #ifndef __ASMARM_ARCH_SCU_H #define __ASMARM_ARCH_SCU_H -/* - * SCU registers - */ -#define SCU_CTRL 0x00 -#define SCU_CONFIG 0x04 -#define SCU_CPU_STATUS 0x08 -#define SCU_INVALIDATE 0x0c -#define SCU_FPGA_REVISION 0x10 +unsigned int scu_get_core_count(void __iomem *); +void scu_enable(void __iomem *); #endif diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 11a5197a221f..90ffbaf23b4e 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -22,6 +22,7 @@ obj-$(CONFIG_ARTHUR) += arthur.o obj-$(CONFIG_ISA_DMA) += dma-isa.o obj-$(CONFIG_PCI) += bios32.o isa.o obj-$(CONFIG_SMP) += smp.o +obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o obj-$(CONFIG_KPROBES) += kprobes.o kprobes-decode.o diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c new file mode 100644 index 000000000000..7f24ee9d7330 --- /dev/null +++ b/arch/arm/kernel/smp_scu.c @@ -0,0 +1,41 @@ +/* + * linux/arch/arm/kernel/smp_scu.c + * + * Copyright (C) 2002 ARM Ltd. + * All Rights Reserved + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/init.h> +#include <linux/io.h> + +#include <asm/smp_scu.h> + +#define SCU_CTRL 0x00 +#define SCU_CONFIG 0x04 +#define SCU_CPU_STATUS 0x08 +#define SCU_INVALIDATE 0x0c +#define SCU_FPGA_REVISION 0x10 + +/* + * Get the number of CPU cores from the SCU configuration + */ +unsigned int __init scu_get_core_count(void __iomem *scu_base) +{ + unsigned int ncores = __raw_readl(scu_base + SCU_CONFIG); + return (ncores & 0x03) + 1; +} + +/* + * Enable the SCU + */ +void __init scu_enable(void __iomem *scu_base) +{ + u32 scu_ctrl; + + scu_ctrl = __raw_readl(scu_base + SCU_CTRL); + scu_ctrl |= 1; + __raw_writel(scu_ctrl, scu_base + SCU_CTRL); +} diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c index c567d3e24447..c862ce19587e 100644 --- a/arch/arm/mach-realview/platsmp.c +++ b/arch/arm/mach-realview/platsmp.c @@ -45,31 +45,12 @@ static void __iomem *scu_base_addr(void) return (void __iomem *)0; } -static unsigned int __init get_core_count(void) +static inline unsigned int get_core_count(void) { - unsigned int ncores; void __iomem *scu_base = scu_base_addr(); - - if (scu_base) { - ncores = __raw_readl(scu_base + SCU_CONFIG); - ncores = (ncores & 0x03) + 1; - } else - ncores = 1; - - return ncores; -} - -/* - * Setup the SCU - */ -static void scu_enable(void) -{ - u32 scu_ctrl; - void __iomem *scu_base = scu_base_addr(); - - scu_ctrl = __raw_readl(scu_base + SCU_CTRL); - scu_ctrl |= 1; - __raw_writel(scu_ctrl, scu_base + SCU_CTRL); + if (scu_base) + return scu_get_core_count(scu_base); + return 1; } static DEFINE_SPINLOCK(boot_lock); @@ -239,7 +220,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) */ percpu_timer_setup(); - scu_enable(); + scu_enable(scu_base_addr()); poke_milo(); } } |