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authorSiddharth Vadapalli2023-09-27 09:48:45 +0530
committerKrzysztof Wilczyński2024-01-09 03:38:22 +0000
commitc12ca110c613a81cb0f0099019c839d078cd0f38 (patch)
treec00c55ee1fb7fbf00f3f9e4ed31726e456d96807 /crypto/compress.c
parentb85ea95d086471afb4ad062012a4d73cd328fa86 (diff)
PCI: keystone: Fix race condition when initializing PHYs
The PCI driver invokes the PHY APIs using the ks_pcie_enable_phy() function. The PHY in this case is the Serdes. It is possible that the PCI instance is configured for two lane operation across two different Serdes instances, using one lane of each Serdes. In such a configuration, if the reference clock for one Serdes is provided by the other Serdes, it results in a race condition. After the Serdes providing the reference clock is initialized by the PCI driver by invoking its PHY APIs, it is not guaranteed that this Serdes remains powered on long enough for the PHY APIs based initialization of the dependent Serdes. In such cases, the PLL of the dependent Serdes fails to lock due to the absence of the reference clock from the former Serdes which has been powered off by the PM Core. Fix this by obtaining reference to the PHYs before invoking the PHY initialization APIs and releasing reference after the initialization is complete. Link: https://lore.kernel.org/linux-pci/20230927041845.1222080-1-s-vadapalli@ti.com Fixes: 49229238ab47 ("PCI: keystone: Cleanup PHY handling") Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Acked-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Diffstat (limited to 'crypto/compress.c')
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