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author | Stephen Boyd | 2022-01-11 18:31:00 -0800 |
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committer | Stephen Boyd | 2022-01-11 18:31:00 -0800 |
commit | 4afd2a9355a9deb16ea42b896820dacf49843a8f (patch) | |
tree | 3d59babae91762121bc1932342f75f0bde30e575 /drivers/acpi | |
parent | 1d0bd126d9282ce198c85a6f83036f68e1c6cc3c (diff) | |
parent | b5bc83bb70a5ca8fc090de3221fd8f1d4400241a (diff) | |
parent | ec97d23c8e22c96e8c9cad7d3f93d593abfc8b06 (diff) |
Merge branches 'clk-ingenic' and 'clk-mediatek' into clk-next
- Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
- MediaTek mt7986 SoC basic support
* clk-ingenic:
clk: ingenic: Add MDMA and BDMA clocks
dt-bindings: clk/ingenic: Add MDMA and BDMA clocks
* clk-mediatek:
clk: mediatek: add mt7986 clock support
clk: mediatek: add mt7986 clock IDs
dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC
clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers
clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper