diff options
author | Laurentiu Tudor | 2021-07-15 17:07:13 +0300 |
---|---|---|
committer | Greg Kroah-Hartman | 2021-07-21 13:56:25 +0200 |
commit | c40cbad63ddcbf47debe350e736e37525a0c336c (patch) | |
tree | da4882e037d6cc58846a61fcc5fb42d6f9c966de /drivers/bus/fsl-mc | |
parent | f8cfa9bbab338b64229bffb93fdbb755be9d58d5 (diff) |
bus: fsl-mc: fully resume the firmware
The MC firmware has two execution units. Resume them both, as on some
Layerscape SoCs not doing so breaks the firmware.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Link: https://lore.kernel.org/r/20210715140718.8513-3-laurentiu.tudor@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/bus/fsl-mc')
-rw-r--r-- | drivers/bus/fsl-mc/fsl-mc-bus.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/bus/fsl-mc/fsl-mc-bus.c b/drivers/bus/fsl-mc/fsl-mc-bus.c index ffd7a1ff957a..2341de6bce67 100644 --- a/drivers/bus/fsl-mc/fsl-mc-bus.c +++ b/drivers/bus/fsl-mc/fsl-mc-bus.c @@ -63,6 +63,7 @@ struct fsl_mc_addr_translation_range { #define FSL_MC_GCR1 0x0 #define GCR1_P1_STOP BIT(31) +#define GCR1_P2_STOP BIT(30) #define FSL_MC_FAPR 0x28 #define MC_FAPR_PL BIT(18) @@ -1118,7 +1119,8 @@ static int fsl_mc_bus_probe(struct platform_device *pdev) * At this point MC should have all its SMMU setup done so make * sure it is resumed. */ - writel(readl(mc->fsl_mc_regs + FSL_MC_GCR1) & (~GCR1_P1_STOP), + writel(readl(mc->fsl_mc_regs + FSL_MC_GCR1) & + (~(GCR1_P1_STOP | GCR1_P2_STOP)), mc->fsl_mc_regs + FSL_MC_GCR1); } |