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authorIllia Smyrnov2015-04-16 17:42:30 -0500
committerTony Lindgren2015-05-04 10:21:01 -0700
commit4adf82c35572c69e96997641612fc88463b08f6f (patch)
treec9ce8d2500988ab96e91dbaab177bd817fd6bdae /drivers/bus
parent1822734677d95888d18e3c0e0743727effa62f8e (diff)
bus: omap_l3_noc: Fix offset for DRA7 CLK1_HOST_CLK1_2 instance
The base address for DRA7 CLK1_HOST_CLK1_2 host instance is 0x44800000, so correct offset is 0x800000. DRA7 TRM rev X(fewb 2015) has updates for this information. With wrong offset these errors are not correctly cleared by the L3 IRQ handler and cause an continuous interrupt scenario and system lockup. Signed-off-by: Illia Smyrnov <illia.smyrnov@globallogic.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'drivers/bus')
-rw-r--r--drivers/bus/omap_l3_noc.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h
index 95254585db86..a314d800f394 100644
--- a/drivers/bus/omap_l3_noc.h
+++ b/drivers/bus/omap_l3_noc.h
@@ -274,7 +274,7 @@ static struct l3_flagmux_data dra_l3_flagmux_clk1 = {
static struct l3_target_data dra_l3_target_data_clk2[] = {
{0x0, "HOST CLK1",},
- {0x0, "HOST CLK2",},
+ {0x800000, "HOST CLK2",},
{0xdead, L3_TARGET_NOT_SUPPORTED,},
{0x3400, "SHA2_2",},
{0x0900, "BB2D",},