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author | Chen-Yu Tsai | 2016-08-25 14:21:56 +0800 |
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committer | Maxime Ripard | 2016-08-25 22:26:44 +0200 |
commit | 2b9c875c56f0bec92b301061fe3c2adb5e098b36 (patch) | |
tree | 8dd42f812d70db69bbcfef42a99cf154e8cdd47d /drivers/clk/clk-max77802.c | |
parent | 89af85253c32b67898c0f8bb06fe6e790e62846f (diff) |
clk: sunxi-ng: mux: Add support for mux tables
Some clock muxes have holes, i.e. invalid or unconnected inputs,
between parent mux values.
Add support for specifying a mux table to map clock parents to
mux values.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/clk-max77802.c')
0 files changed, 0 insertions, 0 deletions