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authorDong Aisheng2021-06-04 17:09:36 +0800
committerAbel Vesa2021-06-14 12:34:19 +0300
commitaecf425fa948e0ea9d0f7d86317b2c509108daae (patch)
treec2796d6752523b8642eeda0e370e114b06bf4634 /drivers/clk/imx
parentb192d04011ee7dadfa3045beae4a2ef7dd71d027 (diff)
clk: imx: scu: bypass cpu clock save and restore
CPU clock is managed by ATF. No need save and restore. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Diffstat (limited to 'drivers/clk/imx')
-rw-r--r--drivers/clk/imx/clk-scu.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-scu.c b/drivers/clk/imx/clk-scu.c
index 680b2650fd45..d87a1a1b297e 100644
--- a/drivers/clk/imx/clk-scu.c
+++ b/drivers/clk/imx/clk-scu.c
@@ -538,6 +538,11 @@ static int imx_clk_scu_probe(struct platform_device *pdev)
static int __maybe_unused imx_clk_scu_suspend(struct device *dev)
{
struct clk_scu *clk = dev_get_drvdata(dev);
+ u32 rsrc_id = clk->rsrc_id;
+
+ if ((rsrc_id == IMX_SC_R_A35) || (rsrc_id == IMX_SC_R_A53) ||
+ (rsrc_id == IMX_SC_R_A72))
+ return 0;
clk->rate = clk_hw_get_rate(&clk->hw);
clk->is_enabled = clk_hw_is_enabled(&clk->hw);
@@ -554,8 +559,13 @@ static int __maybe_unused imx_clk_scu_suspend(struct device *dev)
static int __maybe_unused imx_clk_scu_resume(struct device *dev)
{
struct clk_scu *clk = dev_get_drvdata(dev);
+ u32 rsrc_id = clk->rsrc_id;
int ret = 0;
+ if ((rsrc_id == IMX_SC_R_A35) || (rsrc_id == IMX_SC_R_A53) ||
+ (rsrc_id == IMX_SC_R_A72))
+ return 0;
+
if (clk->rate) {
ret = clk_scu_set_rate(&clk->hw, clk->rate, 0);
dev_dbg(dev, "restore rate %d %s\n", clk->rate,