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authorGeert Uytterhoeven2017-04-24 16:54:14 +0200
committerGeert Uytterhoeven2017-05-24 10:19:28 +0200
commit80978a4be267e1783444841143cdb0f0eb40061c (patch)
tree28da7163c8f7966a65f8eae1116414810d9ecd12 /drivers/clk/renesas/Kconfig
parent76394a36efb2dcd1ea30607a3831f65272694a62 (diff)
clk: renesas: Rework Kconfig and Makefile logic
The goals are to: - Allow precise control over and automatic selection of which (sub)drivers are used for which SoC (which may change in the future), - Allow adding support for new SoCs easily, - Allow compile-testing of all (sub)drivers, - Keep driver selection logic in the subsystem-specific Kconfig, independent from the architecture-specific Kconfig (i.e. no "select" from arch/arm64/Kconfig.platforms), to avoid dependencies. This is implemented by: - Introducing Kconfig symbols for all drivers and sub-drivers, - Introducing the Kconfig symbol CLK_RENESAS, which is enabled automatically when building for a Renesas ARM platform, and which enables all required drivers without interaction of the user, based on SoC-specific ARCH_* symbols, - Allowing the user to enable any Kconfig symbol manually if COMPILE_TEST is enabled, - Using the new Kconfig symbols instead of the ARCH_* symbols to control compilation in the Makefile, - Always entering drivers/clk/renesas/ during the build. Note that currently not all (sub)drivers are enabled for compile-testing, as they depend on independent fixes in other subsystems. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/renesas/Kconfig')
-rw-r--r--drivers/clk/renesas/Kconfig125
1 files changed, 110 insertions, 15 deletions
diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
index 2586dfa0026b..9c8b44db39f1 100644
--- a/drivers/clk/renesas/Kconfig
+++ b/drivers/clk/renesas/Kconfig
@@ -1,20 +1,115 @@
+config CLK_RENESAS
+ bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS
+ default y if ARCH_RENESAS
+ select CLK_EMEV2 if ARCH_EMEV2
+ select CLK_RZA1 if ARCH_R7S72100
+ select CLK_R8A73A4 if ARCH_R8A73A4
+ select CLK_R8A7740 if ARCH_R8A7740
+ select CLK_R8A7743 if ARCH_R8A7743
+ select CLK_R8A7745 if ARCH_R8A7745
+ select CLK_R8A7778 if ARCH_R8A7778
+ select CLK_R8A7779 if ARCH_R8A7779
+ select CLK_R8A7790 if ARCH_R8A7790
+ select CLK_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793
+ select CLK_R8A7792 if ARCH_R8A7792
+ select CLK_R8A7794 if ARCH_R8A7794
+ select CLK_R8A7795 if ARCH_R8A7795
+ select CLK_R8A7796 if ARCH_R8A7796
+ select CLK_SH73A0 if ARCH_SH73A0
+
+if CLK_RENESAS
+
+# SoC
+config CLK_EMEV2
+ bool "Emma Mobile EV2 clock support" if COMPILE_TEST
+
+config CLK_RZA1
+ bool
+ select CLK_RENESAS_CPG_MSTP
+
+config CLK_R8A73A4
+ bool
+ select CLK_RENESAS_CPG_MSTP
+ select CLK_RENESAS_DIV6
+
+config CLK_R8A7740
+ bool
+ select CLK_RENESAS_CPG_MSTP
+ select CLK_RENESAS_DIV6
+
+config CLK_R8A7743
+ bool
+ select CLK_RCAR_GEN2_CPG
+
+config CLK_R8A7745
+ bool
+ select CLK_RCAR_GEN2_CPG
+
+config CLK_R8A7778
+ bool
+ select CLK_RENESAS_CPG_MSTP
+
+config CLK_R8A7779
+ bool
+ select CLK_RENESAS_CPG_MSTP
+
+config CLK_R8A7790
+ bool
+ select CLK_RCAR_GEN2
+ select CLK_RENESAS_DIV6
+
+config CLK_R8A7791
+ bool
+ select CLK_RCAR_GEN2
+ select CLK_RENESAS_DIV6
+
+config CLK_R8A7792
+ bool
+ select CLK_RCAR_GEN2
+
+config CLK_R8A7794
+ bool
+ select CLK_RCAR_GEN2
+ select CLK_RENESAS_DIV6
+
+config CLK_R8A7795
+ bool
+ select CLK_RCAR_GEN3_CPG
+
+config CLK_R8A7796
+ bool
+ select CLK_RCAR_GEN3_CPG
+
+config CLK_SH73A0
+ bool
+ select CLK_RENESAS_CPG_MSTP
+ select CLK_RENESAS_DIV6
+
+
+# Family
+config CLK_RCAR_GEN2
+ bool
+ select CLK_RENESAS_CPG_MSTP
+ select CLK_RENESAS_DIV6
+
+config CLK_RCAR_GEN2_CPG
+ bool
+ select CLK_RENESAS_CPG_MSSR
+
+config CLK_RCAR_GEN3_CPG
+ bool
+ select CLK_RENESAS_CPG_MSSR
+
+
+# Generic
config CLK_RENESAS_CPG_MSSR
bool
- default y if ARCH_R8A7743
- default y if ARCH_R8A7745
- default y if ARCH_R8A7795
- default y if ARCH_R8A7796
+ select CLK_RENESAS_DIV6
config CLK_RENESAS_CPG_MSTP
bool
- default y if ARCH_R7S72100
- default y if ARCH_R8A73A4
- default y if ARCH_R8A7740
- default y if ARCH_R8A7778
- default y if ARCH_R8A7779
- default y if ARCH_R8A7790
- default y if ARCH_R8A7791
- default y if ARCH_R8A7792
- default y if ARCH_R8A7793
- default y if ARCH_R8A7794
- default y if ARCH_SH73A0
+
+config CLK_RENESAS_DIV6
+ bool "DIV6 clock support" if COMPILE_TEST
+
+endif # CLK_RENESAS