diff options
author | Geert Uytterhoeven | 2019-06-12 17:19:12 +0200 |
---|---|---|
committer | Geert Uytterhoeven | 2019-06-20 11:36:16 +0200 |
commit | d2e4cb45af8facc76e03c9e36675294ed005287c (patch) | |
tree | 2c552471f51e6d006728cce8b20eb96ad49ceb8d /drivers/clk/renesas | |
parent | c1324171a9d1771d3610cd13c952b981d52317df (diff) |
clk: renesas: cpg-mssr: Update kerneldoc for struct cpg_mssr_priv
New fields were added, but kerneldoc was forgotten, or inserted at the
wrong place.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/clk/renesas')
-rw-r--r-- | drivers/clk/renesas/renesas-cpg-mssr.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c index 082d0bf12ea7..4ddf688b8bcc 100644 --- a/drivers/clk/renesas/renesas-cpg-mssr.c +++ b/drivers/clk/renesas/renesas-cpg-mssr.c @@ -112,14 +112,15 @@ static const u16 srcr[] = { * @dev: CPG/MSSR device * @base: CPG/MSSR register block base address * @rmw_lock: protects RMW register accesses + * @np: Device node in DT for this CPG/MSSR module * @clks: Array containing all Core and Module Clocks * @num_core_clks: Number of Core Clocks in clks[] * @num_mod_clks: Number of Module Clocks in clks[] * @last_dt_core_clk: ID of the last Core Clock exported to DT + * @stbyctrl: This device has Standby Control Registers * @notifiers: Notifier chain to save/restore clock state for system resume * @smstpcr_saved[].mask: Mask of SMSTPCR[] bits under our control * @smstpcr_saved[].val: Saved values of SMSTPCR[] - * @stbyctrl: This device has Standby Control Registers */ struct cpg_mssr_priv { #ifdef CONFIG_RESET_CONTROLLER |