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authorChen-Yu Tsai2015-01-06 10:35:12 +0800
committerMaxime Ripard2015-01-06 17:00:15 +0100
commit3ec72fabcc6f4f5c786c50e08b59e1251d0fdfeb (patch)
tree5f28a71bb48d8a98ce10cdff371e546a68e92928 /drivers/clk/sunxi
parent6ea3953da4e645fb4c6bff19b542eee10970505c (diff)
clk: sunxi: Propagate rate changes to parent for mux clocks
The cpu clock on sunxi machines is just a mux clock, which is normally fed by the main PLL, but can be muxed to the main or low power oscillator. Make the mux clock propagate rate changes to its parent, so we can change the clock rate of the PLL, and thus actually implement rate changing on the cpu clock. This patch also removes the no reparenting limit. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/sunxi')
-rw-r--r--drivers/clk/sunxi/clk-sunxi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index 9ba2c5ff2aeb..04e0b334c678 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -778,7 +778,7 @@ static void __init sunxi_mux_clk_setup(struct device_node *node,
of_property_read_string(node, "clock-output-names", &clk_name);
clk = clk_register_mux(NULL, clk_name, parents, i,
- CLK_SET_RATE_NO_REPARENT, reg,
+ CLK_SET_RATE_PARENT, reg,
data->shift, SUNXI_MUX_GATE_WIDTH,
0, &clk_lock);