diff options
| author | Stephen Boyd | 2015-07-30 17:20:57 -0700 |
|---|---|---|
| committer | Michael Turquette | 2015-08-24 16:48:57 -0700 |
| commit | 5cdb1dc50be615aa26f8952e4b6f67b483849e97 (patch) | |
| tree | e7bf934d714c97601759c52cb3ece59ee1abba7e /drivers/clk/tegra/clk-emc.c | |
| parent | 1b14afa64d2ef36f228e9540664586fd7ad67a81 (diff) | |
clk: tegra: Convert to clk_hw based provider APIs
We're removing struct clk from the clk provider API, so switch
this code to using the clk_hw based provider APIs.
Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/tegra/clk-emc.c')
| -rw-r--r-- | drivers/clk/tegra/clk-emc.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/clk/tegra/clk-emc.c b/drivers/clk/tegra/clk-emc.c index 08ae518c9950..138a94b99b5b 100644 --- a/drivers/clk/tegra/clk-emc.c +++ b/drivers/clk/tegra/clk-emc.c @@ -103,7 +103,7 @@ static unsigned long emc_recalc_rate(struct clk_hw *hw, * CCF wrongly assumes that the parent won't change during set_rate, * so get the parent rate explicitly. */ - parent_rate = __clk_get_rate(__clk_get_parent(hw->clk)); + parent_rate = clk_hw_get_rate(clk_hw_get_parent(hw)); val = readl(tegra->clk_regs + CLK_SOURCE_EMC); div = val & CLK_SOURCE_EMC_EMC_2X_CLK_DIVISOR_MASK; @@ -151,7 +151,7 @@ static int emc_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) return 0; } - req->rate = __clk_get_rate(hw->clk); + req->rate = clk_hw_get_rate(hw); return 0; } @@ -314,7 +314,7 @@ static int emc_set_rate(struct clk_hw *hw, unsigned long rate, tegra = container_of(hw, struct tegra_clk_emc, hw); - if (__clk_get_rate(hw->clk) == rate) + if (clk_hw_get_rate(hw) == rate) return 0; /* @@ -527,8 +527,8 @@ struct clk *tegra_clk_register_emc(void __iomem *base, struct device_node *np, if (IS_ERR(clk)) return clk; - tegra->prev_parent = clk_get_parent_by_index( - tegra->hw.clk, emc_get_parent(&tegra->hw)); + tegra->prev_parent = clk_hw_get_parent_by_index( + &tegra->hw, emc_get_parent(&tegra->hw))->clk; tegra->changing_timing = false; /* Allow debugging tools to see the EMC clock */ |