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authorLeonard Crestez2019-11-22 23:45:00 +0200
committerShawn Guo2019-12-09 09:15:12 +0800
commitd9ea9ca2b420123557eca0490295cb4f48615ee2 (patch)
treef68d5ea1137850e8ea94de0d85cae97da98ada43 /drivers/clk/zynq
parent2871736869f031a02deb67ae24794e149ee16a4a (diff)
clk: imx8m: Set CLK_GET_RATE_NOCACHE on dram clocks
These clocks are only modified as part of DRAM frequency switches during which DRAM itself is briefly inaccessible. The switch is performed with a SMC call to by TF-A which runs from a SRAM area; upon returning to linux several clocks bits are modified and we need to update them. For rate bits an easy solution is to just mark with CLK_GET_RATE_NOCACHE so that new rates are always read back from registers. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk/zynq')
0 files changed, 0 insertions, 0 deletions