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authorStephen Boyd2023-06-14 13:58:01 -0700
committerStephen Boyd2023-06-14 13:58:01 -0700
commit3973bcc95e7441ddfad39a8e12d8c1eb1ee36426 (patch)
tree5159a373b1b12bba6ef88bf9251588f551c50d51 /drivers/clk
parentac9a78681b921877518763ba0e89202254349d1b (diff)
parent9a7b010116a430d74dc30a214ea55a58a2863d71 (diff)
Merge tag 'clk-microchip-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into clk-microchip
Pull Microchip clk driver updates from Claudiu Beznea: Polarfire: - new Kconfig symbol name (SOC_MICROCHIP_POLARFIRE) for Microchip FPGA clock drivers PIC32: - use of_property_read_bool() to read "microchip,pic32mzda-sosc" boolean DT property in clk-pic32mzda AT91: - convert clock dt-bindings to YAML * tag 'clk-microchip-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: dt-bindings: clocks: at91sam9x5-sckc: convert to yaml dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml clk: microchip: Use of_property_read_bool() for boolean properties clk: microchip: convert SOC_MICROCHIP_POLARFIRE to ARCH_MICROCHIP_POLARFIRE
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/microchip/Kconfig4
-rw-r--r--drivers/clk/microchip/clk-pic32mzda.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clk/microchip/Kconfig b/drivers/clk/microchip/Kconfig
index e33e51978938..0724ce65898f 100644
--- a/drivers/clk/microchip/Kconfig
+++ b/drivers/clk/microchip/Kconfig
@@ -5,8 +5,8 @@ config COMMON_CLK_PIC32
config MCHP_CLK_MPFS
bool "Clk driver for PolarFire SoC"
- depends on SOC_MICROCHIP_POLARFIRE || COMPILE_TEST
- default SOC_MICROCHIP_POLARFIRE
+ depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST
+ default ARCH_MICROCHIP_POLARFIRE
select AUXILIARY_BUS
help
Supports Clock Configuration for PolarFire SoC
diff --git a/drivers/clk/microchip/clk-pic32mzda.c b/drivers/clk/microchip/clk-pic32mzda.c
index b72c76f9ecd1..eabfc4931fe9 100644
--- a/drivers/clk/microchip/clk-pic32mzda.c
+++ b/drivers/clk/microchip/clk-pic32mzda.c
@@ -184,7 +184,7 @@ static int pic32mzda_clk_probe(struct platform_device *pdev)
clks[UPLLCLK] = clk_register_fixed_rate(&pdev->dev, "usbphy_clk", NULL,
0, 24000000);
/* fixed rate (optional) clock */
- if (of_find_property(np, "microchip,pic32mzda-sosc", NULL)) {
+ if (of_property_read_bool(np, "microchip,pic32mzda-sosc")) {
pr_info("pic32-clk: dt requests SOSC.\n");
clks[SOSCCLK] = pic32_sosc_clk_register(&sosc_clk, core);
}