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authorStephen Boyd2018-06-04 12:27:34 -0700
committerStephen Boyd2018-06-04 12:27:34 -0700
commitb7c82cec0450b075e4eab79edb6b20305040e028 (patch)
tree4703956886be6ddd4c0ef5d73d7cf17a8e4282ce /drivers/clk
parent872e47f75fc5e96d987ad96b2c9b22bdfddf6835 (diff)
parent823b68ea43d8b8641e06ef5db49b164aa10d3901 (diff)
parent5c5e4fe37db02ff90e436c342e922212b6f79f37 (diff)
parentc5fc9cf244b175af63ac40a7e6d236cba64067c8 (diff)
parenta61315473a93e2d36bca276f9b03738936d94a1c (diff)
parente76e56823a318ca580be4cfc5a6a9269bc70abea (diff)
Merge branches 'clk-stm32mp1', 'clk-samsung', 'clk-uniphier-mpeg', 'clk-stratix10' and 'clk-aspeed' into clk-next
* clk-stm32mp1: clk: stm32mp1: Fix a memory leak in 'clk_stm32_register_gate_ops()' clk: stm32mp1: Add CLK_IGNORE_UNUSED to ck_sys_dbg clock clk: stm32mp1: remove ck_apb_dbg clock clk: stm32mp1: set stgen_k clock as critical clk: stm32mp1: add missing tzc2 clock clk: stm32mp1: fix SAI3 & SAI4 clocks clk: stm32mp1: remove unused dfsdm_src[] const clk: stm32mp1: add missing static * clk-samsung: clk: samsung: simplify getting .drvdata * clk-uniphier-mpeg: clk: uniphier: add LD11/LD20 stream demux system clock * clk-stratix10: clk: socfpga: stratix10: suppress unbinding platform's clock driver clk: socfpga: stratix10: use platform driver APIs * clk-aspeed: clk:aspeed: Fix reset bits for PCI/VGA and PECI clk: aspeed: Support second reset register