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authorArnd Bergmann2013-04-09 16:40:45 +0200
committerArnd Bergmann2013-04-09 16:40:45 +0200
commitb8250dc4192c6adab0b9a713a11bf19afc462c96 (patch)
tree830299d0edad314367e075012ef9ca841a3026d1 /drivers/clk
parent56734ee2835caaf62168c28281403b61b5826841 (diff)
parent7a9819950f47dbf319895ee78220f2761f3687a3 (diff)
Merge tag 'omap-for-v3.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
From Tony Lindgren <tony@atomide.com>: Changes needed for enabling SOC_BUS for the SoC revision information. Also enable few HW errata workarounds for omap4. * tag 'omap-for-v3.10/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (236 commits) ARM: OMAP4: Enable fix for Cortex-A9 erratas ARM: OMAP2+: Export SoC information to userspace ARM: OMAP2+: SoC name and revision unification ARM: OMAP2+: Move common part of late init into common function Includes an update to Linux 3.9-rc6 Conflicts: arch/arm/mach-omap2/cclock44xx_data.c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/tegra/clk-tegra20.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c
index b92d48be4cc9..bf194009e20f 100644
--- a/drivers/clk/tegra/clk-tegra20.c
+++ b/drivers/clk/tegra/clk-tegra20.c
@@ -703,7 +703,7 @@ static void tegra20_pll_init(void)
clks[pll_a_out0] = clk;
/* PLLE */
- clk = tegra_clk_register_plle("pll_e", "pll_ref", clk_base, NULL,
+ clk = tegra_clk_register_plle("pll_e", "pll_ref", clk_base, pmc_base,
0, 100000000, &pll_e_params,
0, pll_e_freq_table, NULL);
clk_register_clkdev(clk, "pll_e", NULL);