diff options
author | Stephen Boyd | 2022-12-12 11:13:08 -0800 |
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committer | Stephen Boyd | 2022-12-12 11:13:08 -0800 |
commit | e0a1d1394b220d8083c773d1f208925aa1e0eddf (patch) | |
tree | 4a33cc153c3b4acd4950a28537258da569494047 /drivers/clk | |
parent | 83907bf316287ad9b888e1661d34c6ed0b3313f2 (diff) | |
parent | 5381dc785312e2ea77febd8274834ee5b59f580e (diff) | |
parent | 76c340e93f5aa5d66cf62dd0a78777e499f36952 (diff) | |
parent | 266162b799a72e42bb722e81670328981b34da83 (diff) | |
parent | 5595eabd99934b464a4c845f968871ce029282bc (diff) |
Merge branches 'clk-spear', 'clk-fract', 'clk-rockchip' and 'clk-imx' into clk-next
- Debugfs support for fractional divider clk
* clk-spear:
clk: spear: Fix SSP clock definition on SPEAr600
clk: spear: Fix CLCD clock definition on SPEAr600
* clk-fract:
clk: fractional-divider: Regroup inclusions
clk: fractional-divider: Show numerator and denominator in debugfs
clk: fractional-divider: Split out clk_fd_get_div() helper
* clk-rockchip:
clk: rockchip: Fix memory leak in rockchip_clk_register_pll()
clk: rockchip: add clock controller for the RK3588
clk: rockchip: add lookup table support
clk: rockchip: simplify rockchip_clk_add_lookup
clk: rockchip: allow additional mux options for cpu-clock frequency changes
clk: rockchip: add pll type for RK3588
clk: rockchip: add register offset of the cores select parent
dt-bindings: clock: add rk3588 cru bindings
dt-bindings: reset: add rk3588 reset definitions
dt-bindings: clock: add rk3588 clock definitions
clk: rockchip: use proper crypto0 name on rk3399
* clk-imx:
clk: imx: rename imx_obtain_fixed_clk_hw() to imx_get_clk_hw_by_name()
clk: imx8mn: fix imx8mn_enet_phy_sels clocks list
clk: imx8mn: fix imx8mn_sai2_sels clocks list
clk: imx: rename video_pll1 to video_pll
clk: imx: replace osc_hdmi with dummy
clk: imx8mn: rename vpu_pll to m7_alt_pll
clk: imx: imxrt1050: add IMXRT1050_CLK_LCDIF_PIX clock gate
clk: imx: imxrt1050: fix IMXRT1050_CLK_LCDIF_APB offsets
clk: imx8mp: Add audio shared gate
dt-bindings: clock: imx8mp: Add ids for the audio shared gate
clk: imx: pll14xx: Add 320 MHz and 640 MHz entries for PLL146x
clk: imx93: keep sys ctr clock always on
clk: imx: keep hsio bus clock always on
clk: imx93: drop tpm1/3, lpit1/2 clk
dt-bindings: clock: imx93: drop TPM1/3 LPIT1/2 entry
clk: imx93: correct enet clock
clk: imx93: unmap anatop base in error handling path
clk: imx: imx8mp: add shared clk gate for usb suspend clk
dt-bindings: clocks: imx8mp: Add ID for usb suspend clock
clk: imx93: correct the flexspi1 clock setting