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authorStephen Boyd2018-06-04 12:32:24 -0700
committerStephen Boyd2018-06-04 12:32:24 -0700
commitfff2e33717607dcfd9b7c36b244471e3cb271e4b (patch)
tree14a74ad3a406a1a3ae5b402808ba8f2724e91c77 /drivers/clk
parent45ba387511149a5c71d0f720366be64898bc9129 (diff)
parentf82368dd696e8287970b2f6e2d1fbaad3f81e9df (diff)
parent64f929d8246abf76f1e69b49c048b106038512bc (diff)
parent67b6e5cfdb1fb2607a20e1e002719f01b025b197 (diff)
Merge branches 'clk-imx6sx', 'clk-imx7d-enet' and 'clk-aspeed-24' into clk-next
* clk-imx6sx: clk: imx6sl: correct ocram_podf clock type clk: imx6sx: disable unnecessary clocks during clock initialization clk: imx6sx: add missing lvds2 clock to the clock tree * clk-imx7d-enet: ARM: dts: imx7: correct enet ipg clock clk: imx7d: correct enet clock CCGR registers clk: imx7d: correct enet phy ref clock gates * clk-aspeed-24: clk: aspeed: Add 24MHz fixed clock