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authorKonstantin Porotchkin2017-03-30 17:22:53 +0200
committerUlf Hansson2017-04-24 21:42:12 +0200
commita8309cedcdce94fc6e36d49d0bf8e75d5813ebc6 (patch)
treee2c28e4c694c2aa332dc58a9de812dc465323348 /drivers/clk
parent25fc846503738c3d4ca886cfee4b4ff4415d0cec (diff)
clk: apn806: Add eMMC clock to system controller driver
Add fixed clock of 400MHz to system controller driver. This clock is used as SD/eMMC clock source. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Omri Itach <omrii@marvell.com> Reviewed-by: Hanna Hawa <hannah@marvell.com> [fixed up conflicts, added error handling --rmk] Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/mvebu/ap806-system-controller.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/clk/mvebu/ap806-system-controller.c b/drivers/clk/mvebu/ap806-system-controller.c
index f17702107ac5..901d89c4ab4a 100644
--- a/drivers/clk/mvebu/ap806-system-controller.c
+++ b/drivers/clk/mvebu/ap806-system-controller.c
@@ -23,7 +23,7 @@
#define AP806_SAR_REG 0x400
#define AP806_SAR_CLKFREQ_MODE_MASK 0x1f
-#define AP806_CLK_NUM 4
+#define AP806_CLK_NUM 5
static struct clk *ap806_clks[AP806_CLK_NUM];
@@ -135,6 +135,17 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev)
goto fail3;
}
+ /* eMMC Clock is fixed clock divided by 3 */
+ of_property_read_string_index(np, "clock-output-names",
+ 4, &name);
+ ap806_clks[4] = clk_register_fixed_factor(NULL, name, fixedclk_name,
+ 0, 1, 3);
+ if (IS_ERR(ap806_clks[4])) {
+ ret = PTR_ERR(ap806_clks[4]);
+ goto fail4;
+ }
+
+ of_clk_add_provider(np, of_clk_src_onecell_get, &ap806_clk_data);
ret = of_clk_add_provider(np, of_clk_src_onecell_get, &ap806_clk_data);
if (ret)
goto fail_clk_add;
@@ -142,6 +153,8 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev)
return 0;
fail_clk_add:
+ clk_unregister_fixed_factor(ap806_clks[4]);
+fail4:
clk_unregister_fixed_factor(ap806_clks[3]);
fail3:
clk_unregister_fixed_rate(ap806_clks[2]);