diff options
| author | Marek Szyprowski | 2014-09-16 13:54:31 +0200 |
|---|---|---|
| committer | Tomasz Figa | 2014-09-22 14:31:06 +0200 |
| commit | c14254300131f5dcb3fe18a1ff6eee163c2bc9b4 (patch) | |
| tree | 1844f6e0a17bd312c4f0c90915e86637c9c594f6 /drivers/clk | |
| parent | 07ccf02ba5c3b2c6ff7d0325aefabe3b79732b57 (diff) | |
clk: samsung: exynos4: add missing smmu_g2d clock and update comments
This patch adds missing smmu_g2d clock implementation and updates
comment about Exynos4 clocks from 278-282 range. Those clocks are
available on all Exynos4 SoC series, so the misleading comment has been
removed.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/samsung/clk-exynos4.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index ac163d7f5bc3..12a7cc3b5953 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -1183,6 +1183,7 @@ static struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = { GATE(CLK_SPI1_ISP, "spi1_isp", "aclk200", E4X12_GATE_ISP1, 13, CLK_IGNORE_UNUSED | CLK_GET_RATE_NOCACHE, 0), GATE(CLK_G2D, "g2d", "aclk200", GATE_IP_DMC, 23, 0, 0), + GATE(CLK_SMMU_G2D, "smmu_g2d", "aclk200", GATE_IP_DMC, 24, 0, 0), GATE(CLK_TMU_APBIF, "tmu_apbif", "aclk100", E4X12_GATE_IP_PERIR, 17, 0, 0), }; |