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authorLinus Torvalds2016-01-20 17:30:20 -0800
committerLinus Torvalds2016-01-20 17:30:20 -0800
commite3de671dd6784e30821e64f67f854b90b4496a68 (patch)
tree82cc89b65419ae5f04586075616d2de58312a770 /drivers/clk
parent71e4634e00119b2fb8dd0da99b3f5ebbb49cc872 (diff)
parent040b323b5012b5503561ec7fe15cccd6a4bcaec2 (diff)
Merge tag 'asm-generic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic
Pull asm-generic updates from Arnd Bergmann: "The asm-generic tree this time contains one series from Nicolas Pitre that makes the optimized do_div() implementation from the ARM architecture available to all architectures. This also adds stricter type checking for callers of do_div, which has uncovered a number of bugs in existing code, and fixes up the ones we have found" * tag 'asm-generic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: ARM: asm/div64.h: adjust to generic codde __div64_32(): make it overridable at compile time __div64_const32(): abstract out the actual 128-bit cross product code do_div(): generic optimization for constant divisor on 32-bit machines div64.h: optimize do_div() for power-of-two constant divisors mtd/sm_ftl.c: fix wrong do_div() usage drm/mgag200/mgag200_mode.c: fix wrong do_div() usage hid-sensor-hub.c: fix wrong do_div() usage ti/fapll: fix wrong do_div() usage ti/clkt_dpll: fix wrong do_div() usage tegra/clk-divider: fix wrong do_div() usage imx/clk-pllv2: fix wrong do_div() usage imx/clk-pllv1: fix wrong do_div() usage nouveau/nvkm/subdev/clk/gk20a.c: fix wrong do_div() usage
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/tegra/clk-divider.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/tegra/clk-divider.c b/drivers/clk/tegra/clk-divider.c
index 48c83efda4cf..16e0aee14773 100644
--- a/drivers/clk/tegra/clk-divider.c
+++ b/drivers/clk/tegra/clk-divider.c
@@ -32,7 +32,7 @@
static int get_div(struct tegra_clk_frac_div *divider, unsigned long rate,
unsigned long parent_rate)
{
- s64 divider_ux1 = parent_rate;
+ u64 divider_ux1 = parent_rate;
u8 flags = divider->flags;
int mul;
@@ -54,7 +54,7 @@ static int get_div(struct tegra_clk_frac_div *divider, unsigned long rate,
divider_ux1 -= mul;
- if (divider_ux1 < 0)
+ if ((s64)divider_ux1 < 0)
return 0;
if (divider_ux1 > get_max_div(divider))