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author | Stephen Boyd | 2019-03-08 10:34:22 -0800 |
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committer | Stephen Boyd | 2019-03-08 10:34:22 -0800 |
commit | fea0b0850aad878391b1021b3b1b4044c4ec5aaf (patch) | |
tree | cdb3f53dc014fb8e0c4346e905751bfb77c32bd2 /drivers/clk | |
parent | bd5e2ea291a8b34d2ebfbfeff94d4aafe25d37e4 (diff) | |
parent | 463a554baa9feb31eb31281ff18f08d139f58acb (diff) | |
parent | f79bae1666f8af6ce0c2da0b2057675ba6185a25 (diff) | |
parent | 51ff86dd1069a9ea52672efb20b89dbaff6dffe1 (diff) | |
parent | a49ba41c53d1da529e0573e08d5991abb72eaedf (diff) |
Merge branches 'clk-typo', 'clk-json-schema', 'clk-mtk-2712-eco' and 'clk-rockchip' into clk-next
- Convert a few clk bindings to JSON schema format
- 3rd ECO fix for Mediatek MT2712 SoCs
* clk-typo:
clk: samsung: fix typo
* clk-json-schema:
dt-bindings: clock: Convert fixed-factor-clock to json-schema
dt-bindings: clock: Convert fixed-clock binding to json-schema
* clk-mtk-2712-eco:
clk: mediatek: update clock driver of MT2712
dt-bindings: clock: add clock for MT2712
* clk-rockchip:
clk: rockchip: add CLK_SET_RATE_PARENT for rk3066 lcdc dclks
clk: rockchip: fix frac settings of GPLL clock for rk3328