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authorAndy Shevchenko2019-06-21 16:19:14 +0300
committerVinod Koul2019-06-25 10:03:33 +0530
commit9e5ab0655ef98cc1261409f94a42219dfb68cc22 (patch)
tree65d4b6a6a282af241657584b8bbebcf29e375371 /drivers/dma/dw
parent2b651ecfc39fb64359ce172c5b589d52cb224ad3 (diff)
dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake
Intel Elkhart Lake OSE (Offload Service Engine) provides few DMA controllers to the host. Enable them in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma/dw')
-rw-r--r--drivers/dma/dw/pci.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/dma/dw/pci.c b/drivers/dma/dw/pci.c
index 6aa1355ded6c..8de87b15a988 100644
--- a/drivers/dma/dw/pci.c
+++ b/drivers/dma/dw/pci.c
@@ -143,6 +143,11 @@ static const struct pci_device_id dw_pci_id_table[] = {
{ PCI_VDEVICE(INTEL, 0x2286), (kernel_ulong_t)&dw_pci_data },
{ PCI_VDEVICE(INTEL, 0x22c0), (kernel_ulong_t)&dw_pci_data },
+ /* Elkhart Lake iDMA 32-bit (OSE DMA) */
+ { PCI_VDEVICE(INTEL, 0x4bb4), (kernel_ulong_t)&idma32_pci_data },
+ { PCI_VDEVICE(INTEL, 0x4bb5), (kernel_ulong_t)&idma32_pci_data },
+ { PCI_VDEVICE(INTEL, 0x4bb6), (kernel_ulong_t)&idma32_pci_data },
+
/* Haswell */
{ PCI_VDEVICE(INTEL, 0x9c60), (kernel_ulong_t)&dw_pci_data },