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authorChannagoud Kadabi2018-09-12 11:06:34 -0700
committerAndy Gross2018-09-13 15:54:05 -0500
commit27450653f1db0b9d5b5048a246c850c52ee4aa61 (patch)
tree19e4535d7999ee456f897a33cf2bb293a1c92b54 /drivers/edac/Kconfig
parentc081f3060fab316fcf103967a24e502d58488849 (diff)
drivers: edac: Add EDAC driver support for QCOM SoCs
Add error reporting driver for Single Bit Errors (SBEs) and Double Bit Errors (DBEs). As of now, this driver supports error reporting for Last Level Cache Controller (LLCC) of Tag RAM and Data RAM. Interrupts are triggered when the errors happen in the cache, the driver handles those interrupts and dumps the syndrome registers. Signed-off-by: Channagoud Kadabi <ckadabi@codeaurora.org> Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Co-developed-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Acked-by: Borislav Petkov <bp@suse.de> Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'drivers/edac/Kconfig')
-rw-r--r--drivers/edac/Kconfig14
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 57304b2e989f..df9467eef32a 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -460,4 +460,18 @@ config EDAC_TI
Support for error detection and correction on the
TI SoCs.
+config EDAC_QCOM
+ tristate "QCOM EDAC Controller"
+ depends on ARCH_QCOM && QCOM_LLCC
+ help
+ Support for error detection and correction on the
+ Qualcomm Technologies, Inc. SoCs.
+
+ This driver reports Single Bit Errors (SBEs) and Double Bit Errors (DBEs).
+ As of now, it supports error reporting for Last Level Cache Controller (LLCC)
+ of Tag RAM and Data RAM.
+
+ For debugging issues having to do with stability and overall system
+ health, you should probably say 'Y' here.
+
endif # EDAC