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authorBenjamin Herrenschmidt2008-02-07 00:14:52 -0800
committerLinus Torvalds2008-02-07 08:42:23 -0800
commit1d5f726cbf1b736338bbcd83ebc6ad758079261f (patch)
tree770e194dae6a902886ab42d5c0e64f8dc214f656 /drivers/edac
parentc2ae24cfd1969a28e76641807026a3bbc11c5f31 (diff)
drivers-edac: add Cell XDR memory types
Add the definitions for the Rambus XDR memory type used by the Cell processor. It's a pre-requisite for the followup Cell EDAC patch. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk Signed-off-by: Doug Thompson <dougthompson@xmission.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/edac')
-rw-r--r--drivers/edac/edac_core.h2
-rw-r--r--drivers/edac/edac_mc_sysfs.c3
2 files changed, 4 insertions, 1 deletions
diff --git a/drivers/edac/edac_core.h b/drivers/edac/edac_core.h
index 2d23e304f5ec..a9aa845dbe74 100644
--- a/drivers/edac/edac_core.h
+++ b/drivers/edac/edac_core.h
@@ -136,6 +136,7 @@ enum mem_type {
MEM_DDR2, /* DDR2 RAM */
MEM_FB_DDR2, /* fully buffered DDR2 */
MEM_RDDR2, /* Registered DDR2 RAM */
+ MEM_XDR, /* Rambus XDR */
};
#define MEM_FLAG_EMPTY BIT(MEM_EMPTY)
@@ -152,6 +153,7 @@ enum mem_type {
#define MEM_FLAG_DDR2 BIT(MEM_DDR2)
#define MEM_FLAG_FB_DDR2 BIT(MEM_FB_DDR2)
#define MEM_FLAG_RDDR2 BIT(MEM_RDDR2)
+#define MEM_FLAG_XDR BIT(MEM_XDR)
/* chipset Error Detection and Correction capabilities and mode */
enum edac_type {
diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c
index 9aac88027fb3..021d18795145 100644
--- a/drivers/edac/edac_mc_sysfs.c
+++ b/drivers/edac/edac_mc_sysfs.c
@@ -73,7 +73,8 @@ static const char *mem_types[] = {
[MEM_RMBS] = "RMBS",
[MEM_DDR2] = "Unbuffered-DDR2",
[MEM_FB_DDR2] = "FullyBuffered-DDR2",
- [MEM_RDDR2] = "Registered-DDR2"
+ [MEM_RDDR2] = "Registered-DDR2",
+ [MEM_XDR] = "XDR"
};
static const char *dev_types[] = {