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author | Grygorii Strashko | 2020-03-03 18:00:27 +0200 |
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committer | Kishon Vijay Abraham I | 2020-03-20 19:34:29 +0530 |
commit | d9aa91dfb2da59c1f22887013a1cec32a6f9fcec (patch) | |
tree | 75686dc3e87a7d145729f73c57e4e25907dba3a8 /drivers/eisa/.gitignore | |
parent | 74e29703a78c120cd129e2b49ac8213713d2648c (diff) |
phy: ti: gmii-sel: add support for am654x/j721e soc
TI AM654x/J721E SoCs have the same PHY interface selection mechanism for
CPSWx subsystem as TI SoCs (AM3/4/5/DRA7), but registers and bit-fields
placement is different.
This patch adds corresponding support for TI AM654x/J721E SoCs PHY
interface selection.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/eisa/.gitignore')
0 files changed, 0 insertions, 0 deletions