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authorChris Wilson2010-12-04 07:45:57 +0000
committerChris Wilson2010-12-04 13:41:04 +0000
commit49078f7d108f132582e5af46304c317b55f83948 (patch)
treece32c5971d1d70444142e7e618c29b63b5a6e4fe /drivers/gpu/drm/i915/intel_display.c
parent22ed1113a9adda6e193c329119a384362da01289 (diff)
drm/i915: Factor in pixel-repeat in FDI M/N calculation
Fixes the modesetting on the secondary panel of the Libretto W100 and presumably many more Ironlake laptops with SDVO LVDS displays. Reported-and-tested-by: Matthew Willoughby <mattfredwill@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index fac118b2df7d..d9b7092439ef 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3710,6 +3710,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
/* FDI link */
if (HAS_PCH_SPLIT(dev)) {
+ int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
int lane = 0, link_bw, bpp;
/* CPU eDP doesn't require FDI link, so just set DP M/N
according to current link config */
@@ -3793,6 +3794,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
intel_crtc->fdi_lanes = lane;
+ if (pixel_multiplier > 1)
+ link_bw *= pixel_multiplier;
ironlake_compute_m_n(bpp, lane, target_clock, link_bw, &m_n);
}