diff options
| author | Ville Syrjälä | 2020-07-08 16:12:22 +0300 |
|---|---|---|
| committer | Ville Syrjälä | 2020-07-09 16:50:07 +0300 |
| commit | cd7a88113d102e42320b897c306bb52018669a21 (patch) | |
| tree | d67f249a505c30849a848aea27955ad29caad127 /drivers/gpu/drm/i915 | |
| parent | c4615b2b4f3e5789b48395321f679519fd4f2b81 (diff) | |
drm/i915: Limit WaFbcHighMemBwCorruptionAvoidance to skl and bxt
Supposedly only skl/bxt need WaFbcHighMemBwCorruptionAvoidance.
Do not apply to the other gen9 platforms.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200708131223.9519-3-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 7aef450481ea..88e7d6b3212e 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -98,10 +98,6 @@ static void gen9_init_clock_gating(struct drm_i915_private *dev_priv) I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) | DISP_FBC_MEMORY_WAKE); - /* WaFbcHighMemBwCorruptionAvoidance:skl,bxt,kbl,cfl */ - I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | - ILK_DPFC_DISABLE_DUMMY0); - if (IS_SKYLAKE(dev_priv)) { /* WaDisableDopClockGating */ I915_WRITE(GEN7_MISCCPCTL, I915_READ(GEN7_MISCCPCTL) @@ -142,6 +138,10 @@ static void bxt_init_clock_gating(struct drm_i915_private *dev_priv) /* WaFbcTurnOffFbcWatermark:bxt */ I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) | DISP_FBC_WM_DIS); + + /* WaFbcHighMemBwCorruptionAvoidance:bxt */ + I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | + ILK_DPFC_DISABLE_DUMMY0); } static void glk_init_clock_gating(struct drm_i915_private *dev_priv) @@ -7238,6 +7238,10 @@ static void skl_init_clock_gating(struct drm_i915_private *dev_priv) /* WaFbcNukeOnHostModify:skl */ I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | ILK_DPFC_NUKE_ON_ANY_MODIFICATION); + + /* WaFbcHighMemBwCorruptionAvoidance:skl */ + I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | + ILK_DPFC_DISABLE_DUMMY0); } static void bdw_init_clock_gating(struct drm_i915_private *dev_priv) |