diff options
| author | Ben Skeggs | 2020-06-22 19:04:55 +1000 |
|---|---|---|
| committer | Ben Skeggs | 2020-07-24 18:50:57 +1000 |
| commit | 44517aa8d787243dad59c0b55131ae4b6dc100f7 (patch) | |
| tree | edb288db3bab669f2879fa14cc0d609867c059ee /drivers/gpu/drm/nouveau | |
| parent | 71e741ad124d07b15d7f1cd481f98d69867ca0a2 (diff) | |
drm/nouveau/svm: convert migrate_clear to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_dma.h | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_dmem.c | 28 |
2 files changed, 12 insertions, 24 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.h b/drivers/gpu/drm/nouveau/nouveau_dma.h index 8778fd6002c0..32a1f03ec488 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dma.h +++ b/drivers/gpu/drm/nouveau/nouveau_dma.h @@ -49,8 +49,6 @@ void nv50_dma_push(struct nouveau_channel *, u64 addr, int length); enum { NvSubSw = 1, NvSubImageBlit = 2, - - NvSubCopy = 4, /* DO NOT CHANGE - hardcoded for kepler gr fifo */ }; /* Object handles - for stuff that's doesn't use handle == oclass. */ @@ -94,12 +92,6 @@ BEGIN_NVC0(struct nouveau_channel *chan, int subc, int mthd, int size) OUT_RING(chan, 0x20000000 | (size << 16) | (subc << 13) | (mthd >> 2)); } -static inline void -BEGIN_IMC0(struct nouveau_channel *chan, int subc, int mthd, u16 data) -{ - OUT_RING(chan, 0x80000000 | (data << 16) | (subc << 13) | (mthd >> 2)); -} - #define WRITE_PUT(val) do { \ mb(); \ nouveau_bo_rd32(chan->push.buffer, 0); \ diff --git a/drivers/gpu/drm/nouveau/nouveau_dmem.c b/drivers/gpu/drm/nouveau/nouveau_dmem.c index a70dce4469f2..6528e60e567e 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dmem.c +++ b/drivers/gpu/drm/nouveau/nouveau_dmem.c @@ -442,7 +442,7 @@ static int nvc0b5_migrate_clear(struct nouveau_drm *drm, u32 length, enum nouveau_aper dst_aper, u64 dst_addr) { - struct nouveau_channel *chan = drm->dmem->migrate.chan; + struct nvif_push *push = drm->dmem->migrate.chan->chan.push; u32 launch_dma = (1 << 10) /* REMAP_ENABLE_TRUE */ | (1 << 8) /* DST_MEMORY_LAYOUT_PITCH. */ | (1 << 7) /* SRC_MEMORY_LAYOUT_PITCH. */ | @@ -454,33 +454,29 @@ nvc0b5_migrate_clear(struct nouveau_drm *drm, u32 length, (1 << 24) /* NUM_DST_COMPONENTS_TWO */; int ret; - ret = RING_SPACE(chan, 12); + ret = PUSH_WAIT(push, 12); if (ret) return ret; switch (dst_aper) { case NOUVEAU_APER_VRAM: - BEGIN_IMC0(chan, NvSubCopy, 0x0264, 0); - break; + PUSH_NVIM(push, NVA0B5, 0x0264, 0); + break; case NOUVEAU_APER_HOST: - BEGIN_IMC0(chan, NvSubCopy, 0x0264, 1); + PUSH_NVIM(push, NVA0B5, 0x0264, 1); break; default: return -EINVAL; } launch_dma |= 0x00002000; /* DST_TYPE_PHYSICAL. */ - BEGIN_NVC0(chan, NvSubCopy, 0x0700, 3); - OUT_RING(chan, 0); - OUT_RING(chan, 0); - OUT_RING(chan, remap); - BEGIN_NVC0(chan, NvSubCopy, 0x0408, 2); - OUT_RING(chan, upper_32_bits(dst_addr)); - OUT_RING(chan, lower_32_bits(dst_addr)); - BEGIN_NVC0(chan, NvSubCopy, 0x0418, 1); - OUT_RING(chan, length >> 3); - BEGIN_NVC0(chan, NvSubCopy, 0x0300, 1); - OUT_RING(chan, launch_dma); + PUSH_NVSQ(push, NVA0B5, 0x0700, 0, + 0x0704, 0, + 0x0708, remap); + PUSH_NVSQ(push, NVA0B5, 0x0408, upper_32_bits(dst_addr), + 0x040c, lower_32_bits(dst_addr)); + PUSH_NVSQ(push, NVA0B5, 0x0418, length >> 3); + PUSH_NVSQ(push, NVA0B5, 0x0300, launch_dma); return 0; } |