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authorAlex Deucher2013-06-25 17:56:16 -0400
committerAlex Deucher2013-06-27 19:40:05 -0400
commita9e61410921bcc1aa8f594ffa6301d5baba90f3b (patch)
tree82c267bd9854a8d0cb7b3a8ccc8693194ecfd236 /drivers/gpu/drm/radeon/radeon_ucode.h
parenta0ceada6b4da18e8539bc3229adae3dc9b05d9a2 (diff)
drm/radeon/kms: add dpm support for SI (v7)
This adds dpm support for SI asics. This includes: - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen1/gen2/gen3 switching - power containment - shader power scaling Set radeon.dpm=1 to enable. v2: enable hainan support, rebase v3: guard acpi stuff v4: fix 64 bit math v5: fix 64 bit div harder v6: fix thermal interrupt check noticed by Jerome v7: attempt fix state enable Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_ucode.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_ucode.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_ucode.h b/drivers/gpu/drm/radeon/radeon_ucode.h
index 4fe9237af83d..d8b05f7bcf1a 100644
--- a/drivers/gpu/drm/radeon/radeon_ucode.h
+++ b/drivers/gpu/drm/radeon/radeon_ucode.h
@@ -111,4 +111,19 @@
#define CAYMAN_SMC_INT_VECTOR_START 0xffc0
#define CAYMAN_SMC_INT_VECTOR_SIZE 0x0040
+#define TAHITI_SMC_UCODE_START 0x10000
+#define TAHITI_SMC_UCODE_SIZE 0xf458
+
+#define PITCAIRN_SMC_UCODE_START 0x10000
+#define PITCAIRN_SMC_UCODE_SIZE 0xe9f4
+
+#define VERDE_SMC_UCODE_START 0x10000
+#define VERDE_SMC_UCODE_SIZE 0xebe4
+
+#define OLAND_SMC_UCODE_START 0x10000
+#define OLAND_SMC_UCODE_SIZE 0xe7b4
+
+#define HAINAN_SMC_UCODE_START 0x10000
+#define HAINAN_SMC_UCODE_SIZE 0xe67C
+
#endif