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authorAlex Deucher2015-05-11 22:01:55 +0200
committerAlex Deucher2015-05-26 10:31:25 -0400
commit84bcd469592eadbf731c07ed7f6654dc71bbe059 (patch)
tree2078c837d7efcadefe4398fd467bc1e7ea028194 /drivers/gpu/drm/radeon/trinity_dpm.c
parentd55a43a3e9258c01a6cac2f3081b3ceaa8e58020 (diff)
drm/radeon/tn/si: enable/disable vce cg when encoding v2
Some of the vce clocks are automatic, others need to be manually enabled. For ease, just disable cg when vce is active. v2: rebased, call vce_v1_0_enable_mgcg directly Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/trinity_dpm.c')
-rw-r--r--drivers/gpu/drm/radeon/trinity_dpm.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/trinity_dpm.c b/drivers/gpu/drm/radeon/trinity_dpm.c
index e0d07802a906..d34bfcdab9be 100644
--- a/drivers/gpu/drm/radeon/trinity_dpm.c
+++ b/drivers/gpu/drm/radeon/trinity_dpm.c
@@ -336,6 +336,7 @@ static const u32 trinity_override_mgpg_sequences[] =
0x00000204, 0x00000000,
};
+extern void vce_v1_0_enable_mgcg(struct radeon_device *rdev, bool enable);
static void trinity_program_clk_gating_hw_sequence(struct radeon_device *rdev,
const u32 *seq, u32 count);
static void trinity_override_dynamic_mg_powergating(struct radeon_device *rdev);
@@ -990,8 +991,14 @@ static void trinity_set_vce_clock(struct radeon_device *rdev,
struct radeon_ps *old_rps)
{
if ((old_rps->evclk != new_rps->evclk) ||
- (old_rps->ecclk != new_rps->ecclk))
+ (old_rps->ecclk != new_rps->ecclk)) {
+ /* turn the clocks on when encoding, off otherwise */
+ if (new_rps->evclk || new_rps->ecclk)
+ vce_v1_0_enable_mgcg(rdev, false);
+ else
+ vce_v1_0_enable_mgcg(rdev, true);
radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk);
+ }
}
static void trinity_program_ttt(struct radeon_device *rdev)