diff options
| author | Eric Anholt | 2019-04-18 17:10:14 -0700 |
|---|---|---|
| committer | Eric Anholt | 2019-05-16 09:24:52 -0700 |
| commit | 38c2c7917adc8fb4ed9114b92923af9abe091af5 (patch) | |
| tree | 7d1ef7f05ad02bb7f5c7eaef80f5573ef5f404ee /drivers/gpu/drm/v3d/v3d_drv.c | |
| parent | 1ba9d7cbc4530ae35eb1ebbd3c5e59d0c587aefa (diff) | |
drm/v3d: Fix and extend MMU error handling.
We were setting the wrong flags to enable PTI errors, so we were
seeing reads to invalid PTEs show up as write errors. Also, we
weren't turning on the interrupts. The AXI IDs we were dumping
included the outstanding write number and so they looked basically
random. And the VIO_ADDR decoding was based on the MMU VA_WIDTH for
the first platform I worked on and was wrong on others. In short,
this was a thorough mess from early HW enabling.
Tested on V3D 4.1 and 4.2 with intentional L2T, CLE, PTB, and TLB
faults.
Signed-off-by: Eric Anholt <eric@anholt.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20190419001014.23579-4-eric@anholt.net
Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Diffstat (limited to 'drivers/gpu/drm/v3d/v3d_drv.c')
| -rw-r--r-- | drivers/gpu/drm/v3d/v3d_drv.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/v3d/v3d_drv.c b/drivers/gpu/drm/v3d/v3d_drv.c index 747fb6205ba8..fea597f4db8a 100644 --- a/drivers/gpu/drm/v3d/v3d_drv.c +++ b/drivers/gpu/drm/v3d/v3d_drv.c @@ -261,6 +261,7 @@ static int v3d_platform_drm_probe(struct platform_device *pdev) mmu_debug = V3D_READ(V3D_MMU_DEBUG_INFO); dev->coherent_dma_mask = DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH)); + v3d->va_width = 30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_VA_WIDTH); ident1 = V3D_READ(V3D_HUB_IDENT1); v3d->ver = (V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_TVER) * 10 + |