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authorNur Hussein2023-04-06 04:25:59 +0800
committerGreg Kroah-Hartman2023-05-24 17:32:35 +0100
commita6eb3aa0ec5b5078d02c48aad29f80c0a1a17974 (patch)
treee0d728e4ab86390ef9923a3e0fcd57bc501a44f2 /drivers/gpu
parenta7f9c14aced359c065f2f3022de6de93e85da92c (diff)
drm/tegra: Avoid potential 32-bit integer overflow
[ Upstream commit 2429b3c529da29d4277d519bd66d034842dcd70c ] In tegra_sor_compute_config(), the 32-bit value mode->clock is multiplied by 1000, and assigned to the u64 variable pclk. We can avoid a potential 32-bit integer overflow by casting mode->clock to u64 before we do the arithmetic and assignment. Signed-off-by: Nur Hussein <hussein@unixcat.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/tegra/sor.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c
index 8af632740673..77723d5f1d3f 100644
--- a/drivers/gpu/drm/tegra/sor.c
+++ b/drivers/gpu/drm/tegra/sor.c
@@ -1153,7 +1153,7 @@ static int tegra_sor_compute_config(struct tegra_sor *sor,
struct drm_dp_link *link)
{
const u64 f = 100000, link_rate = link->rate * 1000;
- const u64 pclk = mode->clock * 1000;
+ const u64 pclk = (u64)mode->clock * 1000;
u64 input, output, watermark, num;
struct tegra_sor_params params;
u32 num_syms_per_line;